FPGA Based SoC Design using Xilinx Vivado EDA
Content
Xilinx Artix-7 FPGA architecture ,
Xilinx Vivado design flow
RTL-HDL design(VHDL/Verilog)
IP cores Creation and Integration
FPGA Programming(JTAG,SD-card and QSPI)
Hardware Debugging (VIO,ILA)
Zynq APSoC for Embedded Design
ZedBoard Application Development
Target Audience
Students pursing B.Tech/B.E,M.Tech/M.E,M.Sc with basic knowledge of Digital Electronics
Faculty from Academia
Working Professionals
Course Fee
Rs 6000/- +applicable GST
Duration
9 days
Mon-Fri ,Evening Batch 6.00pm -8.30pm
Expected Learning Outcome
Rapidly architect an embedded system targetting a ARM processor located on Zedboard
Extend the hardware system with Xilinx provided peripherals
Create your own IP and SoC design and it can be implemented in FPGA.
Perform in-system Hardware-debugging of the post-implemented design
Develop your own software application with Zynq APSoC
Extend the hardware system with Xilinx provided peripherals
Create your own IP and SoC design and it can be implemented in FPGA.
Perform in-system Hardware-debugging of the post-implemented design
Develop your own software application with Zynq APSoC
Location
Cdac-Trivandrum
